Implement of CORDIC Algorithm with a Small Capacity ROM Table
In order to optimize the implementation delay and hardware resource consumption of the Coordinate Rotation Digital Computer（CORDIC） in pipeline architecture，a new implementation method based on look-up table was proposed，which completely eliminatesd the iterative computation. This method requires only a lower capacity ROM table，as well as a simple shift operation on the output of the ROM table，so that sine wave or cosine wave output with high accuracy can be obtained. Theoretical simulation and practical verification were carried out in Matlab，Modelsim and XILINX ISE，and the results show that this method of CORDIC only requires two clock cycles of processing delay，and the hardware resource consumption is also reduced when compared with other methods. Additionally，the circuit output accuracy and maximum working frequency are also improved at a certain level.
Keywords: coordinate rotation digital calculation（CORDIC), pipeline architecture, look-up table, programmable logic gate array, digital signal processing
SHUKLA R, RAY K C. Low latency hybrid CORDIC algorithm [J]. IEEE Transactions on Computers, 2014, 63 (12):3066—3078.
MUNOZ S D, HORMIGO J. High–throughput FPGA implementation of QR decomposition [J]. IEEE Transactions on Circuits and Systems #: Express Briefs, 2015, 62 (9): 861—865.
PRASAD N, TRIPATHY M R, DAS A D, et al. Efficient VLSI implementation of CORDIC based direst digital synthesizer [J]. Intelligent Computing, Communisation and Devises, 2015, 308 (1): 597—603.
NGUYEN H T,NGUYEN X T,PHAM C D. A low power hybrid adaptive CORDIC [J]. IEEE Transactions on Circuits & Systems II Express Briefs, 2018, 65(4):496—500.
SHI F X, ZENG L, CHEN Y, et al. Direst digital frequency synthesizer based on an improved high speed & high precision CORDIC algorithm [J]. Acta Electronics Sinica, 2017, 45 (2): 446—451. (In Chinese)
ZHANG C Z, HAN J N, YAN H Z. Design and implementation of CORDIC algorithm for high speed and precision fixed angle of rotation [J]. Acta Electronics Sinica, 2016, 44 (2): 485—490. (In Chinese)
MEHER P D, PARD S Y. CORDIC design for fixed angle of rotation [J]. IEEE Transactions on Very Large Scale Integration (VL– SI) Systems,2013,21(2):217—228.
XU C,QIN Y C,LI D L,et al. Double-step scaling free CORDIC [J]. Acta Electronics Sinica, 2014, 42(7):1441—1445. (In Chinese)
AGGARBAL S, MEHER P D, DHARE D. Concept,design,and implementation of reconfigurable CORDIC [J]. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2016, 24(4): 1588—1592.
YAO Y F, FU D B, YANG X F. Implement of high speed DDS sir– suit design using improved CORDIC algorithm [J]. Journal of Huazhong University of Science and Technogy (Nature Science Edition), 2009, 37( 2):25—27. (In Chinese)
MADISETTI A, DBENTUS A Y, BILLSON A N. A 100MHs,16b, direst digital frequency synthesizer with a 100dbs spurious free dynamics range [J]. IEEE Journal of Solid–state Circuits, 1999, 34 (8):1034—1043.
VOLDER J E. The CORDIC trigonometries computing technique [J]. IRE Transactions on Electronic Computers, 1959, 8(3):330— 334.
- There are currently no refbacks.