Design of Miniature Image Acquisition System Based on Low Power System on Chip

HU Jin, XIE Lihong, ZOU Wanghui, ZHANG Lei, HU Xiaodong


Based on the development requirements of low-cost and low-power Internet SoC chip, an image acquisition and control system is designed and implemented based on open source RISC_V instruction set architecture SoC chip and SMIC 55nm CMOS process, which uses the low-power open source processor RI5CY SoC chip as a platform and combined with the Low-Voltage CMOS Image Sensor OV7725 with the integrated DSP and A/D conversion chip inside. This paper introduces the block diagram of the image acquisition and control system, and describes a design of image acquisition controller based on AHB bus in detail. An improved asynchronous FIFO with low power and small area is used to realize the synchronous design of different clock domains. According to the results of Modelsim simulation, DC synthesis and FPGA verification shows that the system realizes the video image data acquisition and transmission,which operation flow is simple and easy to debug, and the maximum of the data transmission bandwidth come up to 37MB/s. The chip total area is 3250 μm x 3648 μm and power consumption is only 24.419 mW.



Keywords: image acquisition, Soc,  RISC_V,  asynchronous FIFO

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